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Interest in TSR frame? (Developers)

posted by cm(R) Homepage E-mail, Düsseldorf, Germany, 18.02.2009, 15:11

Before I begin writing it, let's ask me whether someone is interested in yet another assembly TSR frame. I thought about creating one from the program described below.

The RxANSI program I'm developing is now near completion (older beta versions 1-3 could've been available for months if Robert uploaded them) and includes some neat features regarding TSR installation and memory management. It is of course just an ordinary 16-bit Real Mode DOS TSR. It is compatible to the latest AMIS (as described in RBIL 61 only), thus supports interrupt sharing* which allows TSRs to uninstall interrupt handlers when not installed as last TSR. It installs itself using a special method instead of Int27. This requires some MS-DOS compatibility regarding the process termination code and MCB layout of the used DOS. For better placement of the resident portion if there's no UMA the installer contains code to relocate the PSP; this however is executed only with user permission because it requires DOS to be really MS-DOS compatible.

Both RxANSI's and a possible TSR frame's source will be provided by me in NASM style assembly of course. Note that I rely heavily on NASM's preprocessor, don't expect the source to work immediately with old NASM versions or YASM. Someone else could probably port it to JWASM/MASM or FASM if required.


* While interrupt sharing is useful not much software hooking interrupts utilizes it. When no non-compliant TSRs/drivers are installed on an interrupt, it allows any software to trace the chain of interrupt hooks back to the first non-compliant interrupt handler. (The first interrupt handler is of course always non-compliant, because there is no previous one.) Uninstalling of TSRs is then easier and, if required for whatever, software could even do things like re-ordering handlers.

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