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New Xeon's no A20. (Miscellaneous)

posted by RayeR(R) Homepage, CZ, 21.07.2009, 14:58

> Iirc it has to do with the HMA? If seg=<maximal> ofs=<maximal> wraps
> around to the first 64k (PC,XT compat) or to 1MB+64k.

Yes

> The A20 gate handler is the ability to turn the carry to the A20 line
> (making physical addresses >1MB) on and off, originally via the kbd
> controller that had a free pin. Probably it is now always 1MB+64k mapped,
> XT compatibility gone.

Yes, A20 pin is controlled via KBC/chipset but CPU should handle it same way as other address lines. So I don't think it is problem of CPU I would look what chipset this server board use and download spec from intel and look there...

---
DOS gives me freedom to unlimited HW access.

 

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