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RayeR

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CZ,
26.12.2012, 02:40
 

CPUID 2.15 (Announce)

Hi,
after a long time I made some updates to my CPUID, I don't remember all because doing during time between many other things but majors are:
* intel 45nm C2D correct displays non-integer multiplier
* Vcore and min/max boundaried display added for intel 45nm C2D, tested on E8500. I enabled it also for 65nm CPUs for testing, please test it if display reasonable value, you can compare with cpu-z, throttlestop, etc on windows. You can also provide me dump cpuid rdmsr:198 and cpuid rdmsr:ce
* added new method of counting cache size on intel core i3/5/7 nehalem, sandybridge
* display correct multiplier on intel core i3/5/7 nehalem
* extended wrmsr command line option by 2 more args that help you writting partial MSR content - bitwidth and bitshift. They are not mandatory. see cpuid /h
* updated CPUID database with some new intel, AMD, VIA models
http://rayer.g6.cz/programm/cpuid.zip
Somebody mailed me some time ago and requested ability of setting multiplier and VID. I tried it to change but CPU didn't accepted it, regardless EIST is on or off. I think that it's caused by multicore - DOS programs run only on single core while VID/FID MSR may need to be set for all cores.
BTW it would be nice to have some C lib that initialize APIC and then I would pass a function pointer and core number where I want run this function :)

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DOS gives me freedom to unlimited HW access.

Zyzzle

26.12.2012, 05:21

@ RayeR
 

CPUID 2.15

Thanks for this update to CPUID. It is really appreciated!

Although I am not the person that wrote you about mutiplier / CPU voltage changing under EIST, I've been looking for a way to do this in DOS. It would save on heat dissipation and power usage if we could, for example lower CPU voltage and multiplier to minimum values on those systems where EIST is enabled in BIOS. Much like the Win32 program CrystalCPUID. Would you look into it more, if possible? I also think it's a CPU core problem, but then I believe there are ways to access each CPU core under DOS. How do programs like HWINFO detect each core? Maybe change CPU core 0 only on multicore CPUs?

RayeR

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CZ,
26.12.2012, 16:45

@ Zyzzle
 

CPUID 2.15

> I also think it's a CPU core problem,
> but then I believe there are ways to access each CPU core under DOS. How do
> programs like HWINFO detect each core? Maybe change CPU core 0 only on
> multicore CPUs?

I don't know what/how hwinfo do. But it's a long way from detection of cores to running a code on different cores under DOS. I think it needs some low level APIC programming (which itself wouldn't be easy task because probably very platform specific). Maybe someone else was looking at that - Japheth?

BTW on what processor did you tried CPUID? I need tester for 65nm, VID -> Vcore formula maybe different from 45nm, need to check it.

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DOS gives me freedom to unlimited HW access.

Zyzzle

26.12.2012, 23:10

@ RayeR
 

CPUID 2.15

> BTW on what processor did you tried CPUID? I need tester for 65nm, VID ->
> Vcore formula maybe different from 45nm, need to check it.

For now, I only tested on 45 nm CPU -- E7200, E8400, Atom N470 and 32nm 2600k.

I have a 65 nm processor, an E4500, but it is not connected to any board at present. Will test it later and report back.

Zyzzle

29.12.2012, 05:00

@ RayeR
 

CPUID 2.15

OK, I tested CPUID 2.15 on the 65 nm E4500. Detects correctly on stock settings (11*200 = 2.2 GHz, and VID = 1.325V) but does not seem to report overclocked frequency correctly. For example (10*333 = 3.3 Ghz, VID= 1.400v) it still shows default frequency / VID. CPU Temperature seems correct.

RayeR

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CZ,
29.12.2012, 17:08

@ Zyzzle
 

CPUID 2.15

> OK, I tested CPUID 2.15 on the 65 nm E4500. Detects correctly on stock
> settings (11*200 = 2.2 GHz, and VID = 1.325V) but does not seem to report
> overclocked frequency correctly. For example (10*333 = 3.3 Ghz, VID=
> 1.400v) it still shows default frequency / VID. CPU Temperature seems
> correct.

Please could you write me clearly what values are reported and what are real?
Note: cpu seed is measured by TSC, it may not be correct on newer CPUs if some power saving like clock mudulation or EIST is used. The multiplier is readed from MSR but it also may vary. And FSB is calculated as cpuclk/mul because there's no way to measure overclocked FSB. In my case the O'C speed is reported OK:

CPU cores: 2, nominal speed: 3167MHz = 9.5*333MHz; L1 cache = 64kB, 8-way
TSC measured CPU core speed: 3413MHz = 9.5*359MHz; L2 cache = 6144kB, 24-way

(I slightly clocked FSB from 333 to 360MHz)
Then could you compare the Vcore with values reported by ThrottleStop or CPU-Z under windows? Maybe it should be lower. I need to guess offset and mV per LSB.

---
DOS gives me freedom to unlimited HW access.

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