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PCI phased out? (Announce)

posted by Ninho E-mail, 19.02.2011, 10:56

>>> You don't need extra registers (use push/pop).

>> Slower since less pipelinable than non stalling reg operations. And the
>> more regs, the more unnecessary stalls can be avoid.

> Slower? Barely (if at all). Push/pop has been fast, esp. since Pentium (two
> in one clock). How many free registers is enough, 16? 256? 512? 1024?
Actually, these cycle counts are misleading, PUSH/POP effective lag will be dominated by access times to the memory hierarchy, which are much higher than CPU cycles - even to/from L1 cache, where the stack top will likely find its place. Thus when there is pressure on the general registers, PUSH reg/POP reg will incur significant performance penalties and is not a free substitute for more CPU registers :-(

I find appalling that AMD/Intel did not build a way, be it awkward, to access the enlarged 64-bit registers in X86 mode, which would have been so immediately useful unlike the address size extensions that few people require. I'm sure you could easily think of ways to enhance the X86 binary operation encoding to allow for 64 bit operations on the 8 legacy registers, and hardly less easily allow access to the new ones (R8->R15), maybe not all at the same time, all that with minimal compatibility problems in 32 bit mode. But no, they didn't even try ! Drat!

--
Ninho

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